r/AskComputerScience • u/Junior-Title-1987 • 19d ago
Difference between address width, addressability and word size.
I’ve been reading through a computer systems book to become a more knowledgable programmer and I’m not fully understanding the difference between the concepts of address width, addressability and word size. This is how I currently understand them:
Address width refers to the size of pointer data — that is, the value of the pointer. The address width determines how many possible addresses are capable of representation and thus, is one factor in determining the total size of addressable memory.
Addressability refers to the size of data stored at a given address.
Word size refers to the “natural” unit of instruction of the processor. Conventionally, most CPU registers have a width that corresponds with the address width so that a full pointer fits inside a single register. This simplifies the set of operations necessary for the CPU to understand.
I think the connection between address width and word size is what I’m most confused about. For example, if the address width was 2x the word size, would that mean that the CPU would need a combined “read+move” instruction to fully process a single pointer?
1
u/flatfinger 19d ago
Typically, "addressability" refers to the ability to write a chunk of data without affecting adjacent data. A system can easily allow individual octets to be read from RAM the memory subsystem is incapable of accessing anything smaller than 64-bit chunks, by simply having the CPU perform a 64-bit read and only look at 8 bits of the result. Nothing special would be required to support concurrent reads. If one core reads a 64-bit word for the purposes of inspecting an 8-bit piece of it, and another reads that same 64-bit word for the purposes of inspecting a different 8-bit pieces, neither of those accesses will interact with the other in any way.
Writes to memory are a different story. If a program wants to write an 8-bit chunk and memory only supports 64-bit accesses, a system would need to read 64 bits, modify 8 bits of the copy that was just read, and then write all 64 bits back. If two cores try to simultaneously update different 8-bit portions of the same 64-bit word, a lot of arbitration would be needed to ensure that both 8-bit chunks get updated without disturbing anything else. If, however, the system had octet-addressable storage, then the system would record the fact that each thread had only written to one particular 8-bit portion of the 64-bit word, and refrain from writing back to RAM data which had been read but not modified.